The present Invention is directed generally to a novel frequency divider and, more particularly, to a novel analog regenerative frequency divider for use at high microwave frequencies.
Microwave systems, such as radar and communications systems, frequently employ extensive signal processing subsystems. For reasons of economy and design simplicity, it is usually desirable to perform signal processing functions at frequencies much lower than that upon which the microwave system operates. Microwave systems thus typically employ frequency divider circuits to effect a down-conversion of the original microwave signal to a more easily processed frequency range.
There are basically two different types of microwave frequency dividers: regenerative dividers, and circuits that operate as or like digital dividers. The present Invention is a novel member of the regenerative divider family.
FIG. 1 illustrates a typical prior art regenerative frequency divider generally designated by reference numeral 10. The frequency divider 10 includes a mixer circuit 12 having a first input 14 coupled to receive a signal of frequency f.sub.IN to be divided in frequency. A second input 16 is coupled to receive a fed back output signal at a frequency f.sub.OUT =f.sub.IN /2. The mixer 12 mixes the two input signals of frequencies f.sub.IN and f.sub.OUT to produce a signal at a frequency f.sub.X at its output port 18 having components at frequencies given by: ##EQU1##
The signal f.sub.X is fed to a filter network 20 which passes signal components at the frequency f.sub.OUT and rejects signals at the frequency 3f.sub.OUT. The f.sub.OUT output of the filter network 20 is amplified by an amplifier 22 to produce an output signal at frequency f.sub.OUT appearing on signal line 24 which is the frequency divided output signal of the divider 10.
A portion of the output signal at f.sub.OUT appearing on line 24 is fed back through a feedback network 26 to the second input 16 of the mixer 12. The gain of the amplifier 22 must be sufficient to overcome all system losses, allowing the overall loop gain at frequency f.sub.OUT to exceed unity for input signals at frequency f.sub.IN above a certain turn-on threshold level. Due to the positive feedback involved, and the potential instability that can result therefrom, a finite threshold level must be designed into the circuit to guard against undesired spurious oscillations in the absence of an input signal.
Presently available frequency divider circuits for use at microwave frequencies make use of pumped varactor diodes to simultaneously accomplish both the mixing and amplifying functions. A variation on the varactor mixer design is shown in U.S. Pat. No. 4,327,343. The frequency divider described in that patent makes use of the gate-to-source varactor diode of a field-effect transistor (FET) to provide both mixing and subharmonic parametric amplification. The regular amplification properties of the FET are not used in the generation of the frequency divided subharmonic signal.
Microwave frequency dividers using varactor mixers, including circuits which use discrete varactors and those which use FET's as a varactor, all exhibit certain inherent limitations related to varactor losses. These intrinsic losses lead to a built-in minimum threshold level that cannot be reduced by circuit design and thus places an often severe and undesirable limitation on the circuit design. Further, the inherently reactive nature of varactors greatly complicates the design of efficient, stable, and economical frequency dividers for use at microwave frequencies.
The present Invention provides a novel frequency divider for use at high microwave frequencies which is not subject to the above-discussed limitations.